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| author |   Jagan Teki <jagan@amarulasolutions.com> | 2019-12-22 18:52:27 +0530 |
|---|---|---|
| committer |   Maxime Ripard <maxime@cerno.tech> | 2019-12-26 10:36:36 +0100 |
| commit | 52028bfcb2330189c5e4ab943b3530b2117b8525 (patch) | |
| tree | c2aa032fbd0b09ece87c4847fcfd9ec6bd541df3 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/sun4i: dsi: Handle bus clock via regmap_mmio_attach_clk (diff) | |
| download | wireguard-linux-52028bfcb2330189c5e4ab943b3530b2117b8525.tar.xz wireguard-linux-52028bfcb2330189c5e4ab943b3530b2117b8525.zip | |
drm/sun4i: dsi: Add Allwinner A64 MIPI DSI support
The MIPI DSI controller in Allwinner A64 is similar to A33.
But unlike A33, A64 doesn't have DSI_SCLK gating so add compatible
for Allwinner A64 with uninitialized has_mod_clk driver.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@wizzup.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://patchwork.freedesktop.org/patch/msgid/20191222132229.30276-6-jagan@amarulasolutions.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions