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authorGeert Uytterhoeven <geert+renesas@glider.be>2020-09-10 19:05:04 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2020-09-10 19:05:04 +0200
commit52c91f0ca8e43f6ec7d32afd99a68d74914583bf (patch)
tree044548bd5162ca1de43038f25d28aa1523011c50 /tools/perf/scripts/python/export-to-postgresql.py
parentARM: dts: r8a7742-iwg21d-q7: Enable SD2 LED indication (diff)
parentdt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions (diff)
downloadwireguard-linux-52c91f0ca8e43f6ec7d32afd99a68d74914583bf.tar.xz
wireguard-linux-52c91f0ca8e43f6ec7d32afd99a68d74914583bf.zip
Merge tag 'renesas-r8a779a0-dt-binding-defs-tag' into renesas-arm-dt-for-v5.10
Renesas R-Car V3U DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car V3U (R8A779A0) SoC, shared by driver and DT source files.
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