diff options
author | 2023-09-15 18:57:47 +0300 | |
---|---|---|
committer | 2023-10-10 16:03:51 -0500 | |
commit | 52d92516cb2e04a9b1b8837079a561ca672c1d5e (patch) | |
tree | 1e1fbf76d8b780ce1e90e6866e83ae2f3f339d4f /tools/perf/scripts/python/export-to-postgresql.py | |
parent | PCI: Add PCI_L1SS_CTL2 fields (diff) | |
download | wireguard-linux-52d92516cb2e04a9b1b8837079a561ca672c1d5e.tar.xz wireguard-linux-52d92516cb2e04a9b1b8837079a561ca672c1d5e.zip |
PCI/ASPM: Use FIELD_GET/PREP() to access PCIe capability fields
Replace open-coded variants to access PCIe capability registers fields
with FIELD_GET/PREP().
Link: https://lore.kernel.org/r/20230915155752.84640-3-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions