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| author |   Minda Chen <minda.chen@starfivetech.com> | 2024-03-28 17:18:17 +0800 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2024-05-28 11:15:28 -0500 |
| commit | 55ba2532b33cd89270fede9eb02b249f4ae71668 (patch) | |
| tree | 00511669b3677fc6da0d67da127a6835923a0b04 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | PCI: microchip: Move PLDA IP register macros to pcie-plda.h (diff) | |
| download | wireguard-linux-55ba2532b33cd89270fede9eb02b249f4ae71668.tar.xz wireguard-linux-55ba2532b33cd89270fede9eb02b249f4ae71668.zip | |
PCI: microchip: Add bridge_addr field to struct mc_pcie
Bridge address base is common PLDA field, add this to struct mc_pcie first.
INTx and MSI interrupt code will be changed to common code, so get the
bridge base address from port->bridge_addr instead of axi_base_addr.
The axi_base_addr is Microchip-specific data.
Link: https://lore.kernel.org/linux-pci/20240328091835.14797-5-minda.chen@starfivetech.com
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions