diff options
author | 2023-10-09 10:37:45 +0100 | |
---|---|---|
committer | 2023-10-15 13:16:05 +0100 | |
commit | 561add0da6d3d07c9bccb0832fb6ed5619167d26 (patch) | |
tree | 2bd4c9ee7a024fb1e0a32db84a1c8dbb04fe8433 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | Merge initial Sophgo patches into riscv-dt-for-next (diff) | |
download | wireguard-linux-561add0da6d3d07c9bccb0832fb6ed5619167d26.tar.xz wireguard-linux-561add0da6d3d07c9bccb0832fb6ed5619167d26.zip |
riscv: dts: microchip: convert isa detection to new properties
Convert the PolarFire SoC devicetrees to use the new properties
"riscv,isa-base" & "riscv,isa-extensions".
For compatibility with other projects, "riscv,isa" remains.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions