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| author |   Palmer Dabbelt <palmer@rivosinc.com> | 2024-01-04 15:03:09 -0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-01-09 20:10:15 -0800 |
| commit | 5634d9c280d2c91f1759054bcb8c2a4b0abb73c8 (patch) | |
| tree | ca02aa52fc5db47fca7b56c5a4dfc6c98a660e81 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | riscv: Remove obsolete rv32_defconfig file (diff) | |
| parent | riscv: Use the same CPU operations for all CPUs (diff) | |
| download | wireguard-linux-5634d9c280d2c91f1759054bcb8c2a4b0abb73c8.tar.xz wireguard-linux-5634d9c280d2c91f1759054bcb8c2a4b0abb73c8.zip | |
Merge patch series "riscv: CPU operations cleanup"
Samuel Holland <samuel.holland@sifive.com> says:
This series cleans up some duplicated and dead code around the RISC-V
CPU operations, that was copied from arm64 but is not needed here. The
result is a bit of memory savings and removal of a few SBI calls during
boot, with no functional change.
* b4-shazam-merge:
riscv: Use the same CPU operations for all CPUs
riscv: Remove unused members from struct cpu_operations
riscv: Deduplicate code in setup_smp()
Link: https://lore.kernel.org/r/20231121234736.3489608-1-samuel.holland@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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