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| author |   Shravan Chippa <shravan.chippa@microchip.com> | 2023-12-08 16:08:56 +0530 |
|---|---|---|
| committer |   Conor Dooley <conor.dooley@microchip.com> | 2024-02-06 19:38:40 +0000 |
| commit | 5669bb5a16a0b8bfc3f2877dbfcd77b62cc9ebf4 (patch) | |
| tree | 7f24f272feea7c321040eddc871a34b51f2fc31c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | riscv: dts: microchip: add missing CAN bus clocks (diff) | |
| download | wireguard-linux-5669bb5a16a0b8bfc3f2877dbfcd77b62cc9ebf4.tar.xz wireguard-linux-5669bb5a16a0b8bfc3f2877dbfcd77b62cc9ebf4.zip | |
riscv: dts: microchip: add specific compatible for mpfs pdma
Add specific compatible for PolarFire SoC for The SiFive PDMA driver
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Shravan Chippa <shravan.chippa@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions