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| author |   Brent Lu <brent.lu@intel.com> | 2024-03-27 11:24:08 -0500 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2024-03-28 13:58:26 +0000 |
| commit | 57ad033ce09d4d0c866ac558fc3c4cf53cfb2599 (patch) | |
| tree | b3978cd066f614d9a7b149439a4a0c747b351f88 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ASoC: Intel: sof_cs42l42: add rpl_cs42l42_def for rpl boards (diff) | |
| download | wireguard-linux-57ad033ce09d4d0c866ac558fc3c4cf53cfb2599.tar.xz wireguard-linux-57ad033ce09d4d0c866ac558fc3c4cf53cfb2599.zip | |
ASoC: Intel: sof_cs42l42: add mtl_cs42l42_def for mtl boards
Add the board config mtl_cs42l42_def to cs42l42 machine driver for all
mtl boards using default SSP port allocation (headphone codec on SSP2,
speaker amplifiers on SSP0, and BT offload on SSP1).
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Brent Lu <brent.lu@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://msgid.link/r/20240327162408.63953-19-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions