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authorNagarjuna Kristam <nkristam@nvidia.com>2020-02-10 13:41:43 +0530
committerThierry Reding <treding@nvidia.com>2020-03-12 12:14:28 +0100
commit584f800c47b53d59bdc66276c7a6b791278513a9 (patch)
treee45a80389c2ef0679f4be53c45da1b104c16a096 /tools/perf/scripts/python/export-to-postgresql.py
parentarm64: tegra: Enable XUDC on Jetson TX1 (diff)
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arm64: tegra: Add XUDC node for Tegra186
Tegra186 has one XUSB device mode controller, which can be operated in HS and SS modes. Add DT entry for XUSB device mode controller. Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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