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| author |   Yicong Yang <yangyicong@hisilicon.com> | 2020-03-13 17:53:47 +0800 |
|---|---|---|
| committer |   Bjorn Helgaas <bhelgaas@google.com> | 2020-03-18 17:43:14 -0500 |
| commit | 58a3862a10a317a81097ab0c78aecebabb1704f5 (patch) | |
| tree | b324cdaf0a1b4aeee268fb6d0ab6fc5f431ec5da /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Linux 5.6-rc1 (diff) | |
| download | wireguard-linux-58a3862a10a317a81097ab0c78aecebabb1704f5.tar.xz wireguard-linux-58a3862a10a317a81097ab0c78aecebabb1704f5.zip | |
PCI/ASPM: Clear the correct bits when enabling L1 substates
In pcie_config_aspm_l1ss(), we cleared the wrong bits when enabling ASPM L1
Substates. Instead of the L1.x enable bits (PCI_L1SS_CTL1_L1SS_MASK, 0xf), we
cleared the Link Activation Interrupt Enable bit (PCI_L1SS_CAP_L1_PM_SS,
0x10).
Clear the L1.x enable bits before writing the new L1.x configuration.
[bhelgaas: changelog]
Fixes: aeda9adebab8 ("PCI/ASPM: Configure L1 substate settings")
Link: https://lore.kernel.org/r/1584093227-1292-1-git-send-email-yangyicong@hisilicon.com
Signed-off-by: Yicong Yang <yangyicong@hisilicon.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: stable@vger.kernel.org # v4.11+
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions