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| author |   Thierry Reding <treding@nvidia.com> | 2016-06-09 17:53:57 +0200 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2016-07-14 14:57:01 +0200 |
| commit | 618dee3941a43d8d4f762a7af99bcb59baba2bc5 (patch) | |
| tree | f2d28fff57d07089847f8e5972a1e12af742cdd8 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: display: tegra: Add source clock for SOR (diff) | |
| download | wireguard-linux-618dee3941a43d8d4f762a7af99bcb59baba2bc5.tar.xz wireguard-linux-618dee3941a43d8d4f762a7af99bcb59baba2bc5.zip | |
drm/tegra: sor: Use sor1_src clock to set parent for HDMI
When running in HDMI mode, the sor1 IP block needs to use the sor1_src
as parent clock, and in turn configure the sor1_src to use pll_d2_out0
as its parent.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions