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| author |   Enric Balletbo i Serra <enric.balletbo@collabora.com> | 2021-03-09 00:38:55 +0100 |
|---|---|---|
| committer |   Chanwoo Choi <cw00.choi@samsung.com> | 2021-04-08 13:14:50 +0900 |
| commit | 62467a843e2e40cfb71aabb99835cdcf5f534007 (patch) | |
| tree | 74d71e1ccd714bcbf92e82f3109309824bd097a1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | PM / devfreq: rk3399_dmc: Simplify with dev_err_probe() (diff) | |
| download | wireguard-linux-62467a843e2e40cfb71aabb99835cdcf5f534007.tar.xz wireguard-linux-62467a843e2e40cfb71aabb99835cdcf5f534007.zip | |
dt-bindings: devfreq: rk3399_dmc: Add rockchip,pmu phandle.
The Rockchip DMC (Dynamic Memory Interface) needs to access to the PMU
general register files to know the DRAM type, so add a phandle to the
syscon that manages these registers.
Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Gaël PORTAY <gael.portay@collabora.com>
Acked-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions