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| author |   Arnd Bergmann <arnd@arndb.de> | 2020-12-09 20:37:12 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-12-09 20:37:13 +0100 |
| commit | 629c96256de49257b72407ebd256343938234cfa (patch) | |
| tree | cfde7207823e8eeece3c1d612a02506265ff27ea /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge tag 'memory-controller-drv-tegra-5.11-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers (diff) | |
| parent | firmware: xilinx: Properly align function parameter (diff) | |
| download | wireguard-linux-629c96256de49257b72407ebd256343938234cfa.tar.xz wireguard-linux-629c96256de49257b72407ebd256343938234cfa.zip | |
Merge tag 'zynqmp-soc-for-v5.11-v2' of https://github.com/Xilinx/linux-xlnx into arm/drivers
arm64: soc: ZynqMP SoC changes for v5.11 v2
- Small alignments in Xilinx Firmware driver
- Exposing syscon interface for VCU driver
* tag 'zynqmp-soc-for-v5.11-v2' of https://github.com/Xilinx/linux-xlnx:
firmware: xilinx: Properly align function parameter
firmware: xilinx: Add a blank line after function declaration
firmware: xilinx: Remove additional newline
firmware: xilinx: Fix kernel-doc warnings
firmware: xlnx-zynqmp: fix compilation warning
soc: xilinx: vcu: add missing register NUM_CORE
soc: xilinx: vcu: use vcu-settings syscon registers
dt-bindings: soc: xlnx: extract xlnx, vcu-settings to separate binding
soc: xilinx: vcu: drop useless success message
Link: https://lore.kernel.org/r/71d38756-4456-29fc-26a3-341e1d09aafe@monstr.eu
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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