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| author |   Marc Zyngier <maz@kernel.org> | 2022-11-28 11:50:41 +0000 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2022-11-28 11:50:41 +0000 |
| commit | 63ab33c08c41130ad82155515803e90d0e71e8ef (patch) | |
| tree | 7b0ba18ce11bd8233659f711484c9445318a519c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Linux 6.1-rc2 (diff) | |
| parent | irqchip/loongarch: Adjust acpi_cascade_irqdomain_init() and sub-routines (diff) | |
| download | wireguard-linux-63ab33c08c41130ad82155515803e90d0e71e8ef.tar.xz wireguard-linux-63ab33c08c41130ad82155515803e90d0e71e8ef.zip | |
Merge branch irq/loongarch-acpi into irq/irqchip-next
* irq/loongarch-acpi:
: .
: More APCI fixes and improvements for the LoongArch architecture:
:
: - Work around trigger type for INTx interrupts described
: via ACPI (Jianmin Lv).
:
: - ACPI support got the HTVEC controller (Huacai Chen)
:
: - Suspend/resume across the board (Huacai Chen)
:
: - Fixes and random cleanups
: .
irqchip/loongarch: Adjust acpi_cascade_irqdomain_init() and sub-routines
irqchip/loongson-pch-lpc: Add suspend/resume support
irqchip/loongson-pch-pic: Add suspend/resume support
irqchip/loongson-eiointc: Add suspend/resume support
irqchip/loongson-htvec: Add suspend/resume support
irqchip/loongson-htvec: Add ACPI init support
irqchip/loongson-liointc: Support to set IRQ type for ACPI path
irqchip/loongson-pch-pic: Support to set IRQ type for ACPI path
irqchip/loongson-pch-pic: Fix translate callback for DT path
ACPI / PCI: fix LPIC IRQ model default PCI IRQ polarity
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions