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| author |   Fabien Parent <fparent@baylibre.com> | 2019-03-23 22:15:59 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@kernel.org> | 2019-04-25 14:32:51 -0700 |
| commit | 67ea15169b35216bd741bc36ce11cf424245eb88 (patch) | |
| tree | 39cb4a65e58ef358d3a0adc134191ad50e88fe0a /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: mediatek: Allow changing PLL rate when it is off (diff) | |
| download | wireguard-linux-67ea15169b35216bd741bc36ce11cf424245eb88.tar.xz wireguard-linux-67ea15169b35216bd741bc36ce11cf424245eb88.zip | |
dt-bindings: mediatek: topckgen: add support for MT8516
Add binding documentation of topckgen for MT8516 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions