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| author |   Boris Brezillon <boris.brezillon@free-electrons.com> | 2016-12-01 20:27:21 +0100 |
|---|---|---|
| committer |   Stephen Boyd <sboyd@codeaurora.org> | 2016-12-08 14:55:04 -0800 |
| commit | 68af4fa8f39b542a6cde7ac19518d88e9b3099dc (patch) | |
| tree | beb0bea999031d0dcd4729dd6307e9d48ca4c33c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: ti: omap36xx: Work around sprz319 advisory 2.1 (diff) | |
| download | wireguard-linux-68af4fa8f39b542a6cde7ac19518d88e9b3099dc.tar.xz wireguard-linux-68af4fa8f39b542a6cde7ac19518d88e9b3099dc.zip | |
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
bcm2835_pll_divider_off() is resetting the divider field in the A2W reg
to zero when disabling the clock.
Make sure we preserve this value by reading the previous a2w_reg value
first and ORing the result with A2W_PLL_CHANNEL_DISABLE.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks")
Cc: <stable@vger.kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions