diff options
| author |   Chao Song <chao.song@linux.intel.com> | 2023-12-04 15:37:21 -0600 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2023-12-05 13:12:40 +0000 |
| commit | 6da9a662154c8d55fd39820ca882d0646d526e53 (patch) | |
| tree | 8060b6e27c29e5ccf7666792996d677fd33ff6af /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ASoC: Intel: soc-acpi-intel-tgl-match: add cs42l43 and cs35l56 support (diff) | |
| download | wireguard-linux-6da9a662154c8d55fd39820ca882d0646d526e53.tar.xz wireguard-linux-6da9a662154c8d55fd39820ca882d0646d526e53.zip | |
ASoC: rt722-sdca: Set lane_control_support for multilane
The RT722 SDCA codec supports 3 data lanes,
lane_control_support property has to be
set to use additional two lanes.
Reviewed-by: Jack Yu <jack580304@gmail.com>
Reviewed-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Chao Song <chao.song@linux.intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20231204213721.197785-1-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions