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| author |   Rob Herring <robh@kernel.org> | 2024-08-26 13:38:48 -0500 |
|---|---|---|
| committer |   Arnd Bergmann <arnd@arndb.de> | 2024-09-05 11:46:42 +0000 |
| commit | 6e7fd890f1d6ac83805409e9c346240de2705584 (patch) | |
| tree | e9180857f159e60c0566914cf65616b14610d132 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge tag 'qcom-arm64-for-6.12' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt (diff) | |
| download | wireguard-linux-6e7fd890f1d6ac83805409e9c346240de2705584.tar.xz wireguard-linux-6e7fd890f1d6ac83805409e9c346240de2705584.zip | |
arm64: dts: toshiba: Fix pl011 and pl022 clocks
Arm Primecell blocks have a functional clock and a bus clock. The
Toshiba TMPV7708 only defines the bus clock (apb_pclk). Add the
"uartclk" and "sspclk" clocks to the PL011 and PL022 nodes,
respectively.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240826183848.1290957-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions