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| author |   Rob Herring (Arm) <robh@kernel.org> | 2025-04-10 10:47:31 -0500 |
|---|---|---|
| committer |   Heiko Stuebner <heiko@sntech.de> | 2025-04-26 23:00:31 +0200 |
| commit | 709a25f7a433d53dc9f0daf7cf5657f0671c5026 (patch) | |
| tree | a02c311cfb96a88d314a5c5adee0a6b607e09131 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: rockchip: Add aliases for rk3036-kylin MMC devices (diff) | |
| download | wireguard-linux-709a25f7a433d53dc9f0daf7cf5657f0671c5026.tar.xz wireguard-linux-709a25f7a433d53dc9f0daf7cf5657f0671c5026.zip | |
ARM: dts: rockchip: Drop redundant CPU "clock-latency"
The "clock-latency" property is part of the deprecated opp-v1 binding
and is redundant if the opp-v2 table has equal or larger values in any
"clock-latency-ns". Add any missing "clock-latency-ns" properties and
remove "clock-latency".
Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
Link: https://lore.kernel.org/r/20250410-dt-cpu-schema-v2-10-63d7dc9ddd0a@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions