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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2024-01-31 15:16:32 +0100 |
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| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-01-31 15:16:32 +0100 |
| commit | 71a4818ce5cd6a4913de75c6900f83f28476c17f (patch) | |
| tree | 63a1a16a665e3d8f15aecf9740ace8cf4b8b5999 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: renesas: rzg3s-smarc-som: Enable the watchdog interface (diff) | |
| parent | dt-bindings: clock: Add R8A779H0 V4M CPG Core Clock Definitions (diff) | |
| download | wireguard-linux-71a4818ce5cd6a4913de75c6900f83f28476c17f.tar.xz wireguard-linux-71a4818ce5cd6a4913de75c6900f83f28476c17f.zip | |
Merge tag 'renesas-r8a779h0-dt-binding-defs-tag' into renesas-dts-for-v6.9
Renesas R-Car V4M DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car V4M (R8A779H0)
SoC, shared by driver and DT source files.
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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