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| author |   Satya Priya Kakitapalli <quic_skakitap@quicinc.com> | 2023-12-01 15:20:26 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2023-12-15 23:00:50 -0600 |
| commit | 71f130c9193f613d497f7245365ed05ffdb0a401 (patch) | |
| tree | 452996c43d5e043e5ad417174fccf8d0902cafb3 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: qcom: videocc-sm8150: Update the videocc resets (diff) | |
| download | wireguard-linux-71f130c9193f613d497f7245365ed05ffdb0a401.tar.xz wireguard-linux-71f130c9193f613d497f7245365ed05ffdb0a401.zip | |
clk: qcom: videocc-sm8150: Add missing PLL config property
When the driver was ported upstream, PLL test_ctl_hi1 register value
was omitted. Add it to ensure the PLLs are fully configured.
Fixes: 5658e8cf1a8a ("clk: qcom: add video clock controller driver for SM8150")
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231201-videocc-8150-v3-3-56bec3a5e443@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions