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| author |   Wenjing Liu <wenjing.liu@amd.com> | 2022-12-05 18:05:46 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-01-03 16:57:57 -0500 |
| commit | 7462475e3a06fbb0b36243b391296f9f411e9041 (patch) | |
| tree | 5b3834500bdff5f0bc79f1b46bbf80650d759645 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/amd/display: fix dc_get_edp_link_panel_inst to only consider links with panels (diff) | |
| download | wireguard-linux-7462475e3a06fbb0b36243b391296f9f411e9041.tar.xz wireguard-linux-7462475e3a06fbb0b36243b391296f9f411e9041.zip | |
drm/amd/display: move dccg programming from link hwss hpo dp to hwss
[why] dccg clock programming shouldn't be part of link hwss programming
sequence. The scope of link hwss is limited to encoder and phy
programming.
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions