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| author |   Neil Armstrong <neil.armstrong@linaro.org> | 2023-11-14 11:14:44 +0100 |
|---|---|---|
| committer |   Jerome Brunet <jbrunet@baylibre.com> | 2023-11-24 18:08:48 +0100 |
| commit | 773e4e98730845dddab6b4accef03d03b6ff25ce (patch) | |
| tree | 5ed386351bdd666627e0756f8aacab443228ff38 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge branch 'v6.8/dt-bindings' into v6.8/drivers (diff) | |
| download | wireguard-linux-773e4e98730845dddab6b4accef03d03b6ff25ce.tar.xz wireguard-linux-773e4e98730845dddab6b4accef03d03b6ff25ce.zip | |
clk: meson: g12a: add MIPI ISP clocks
Add the MIPI ISP gate, divider and mux used to feed the MIPI CSI ISP
(Image Signal Processor) IP on the Amlogic G12B SoC.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Daniel Scally <dan.scally@ideasonboard.com>
Tested-by: Daniel Scally <dan.scally@ideasonboard.com>
Link: https://lore.kernel.org/r/20231114-topic-amlogic-upstream-isp-clocks-v1-2-223958791501@linaro.org
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions