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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-03-05 17:00:46 +0100 |
|---|---|---|
| committer |   Conor Dooley <conor.dooley@microchip.com> | 2024-03-05 19:22:16 +0000 |
| commit | 7921e231f85a349d5927b26c812c86e03f4cd37b (patch) | |
| tree | 8c07bc7c3b1d36039783183fd35dae93050dff27 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | riscv: dts: sifive: add missing #interrupt-cells to pmic (diff) | |
| download | wireguard-linux-7921e231f85a349d5927b26c812c86e03f4cd37b.tar.xz wireguard-linux-7921e231f85a349d5927b26c812c86e03f4cd37b.zip | |
riscv: dts: starfive: jh7100: fix root clock names
JH7100 clock controller driver depends on certain root clock names.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Closes: https://lore.kernel.org/all/CAMuHMdWw0dteXO2jw4cwGvzKcL6vmnb96C=qgPgUqNDMtF6X0Q@mail.gmail.com/
Fixes: f03606470886 ("riscv: dts: starfive: replace underscores in node names")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions