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| author |   Stefan Riedmueller <s.riedmueller@phytec.de> | 2020-09-17 10:30:02 +0200 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2020-09-22 14:11:24 +0800 |
| commit | 7b0bb204ee705c3b46d8e48f1893979ea6af4753 (patch) | |
| tree | c72c205f2ae849f9630c66c18f2ffb51e1d7d1f9 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dt-bindings: arm: fsl: Add an entry for the i.MX6 LogicPD board (diff) | |
| download | wireguard-linux-7b0bb204ee705c3b46d8e48f1893979ea6af4753.tar.xz wireguard-linux-7b0bb204ee705c3b46d8e48f1893979ea6af4753.zip | |
dt-bindings: arm: fsl: Add PHYTEC i.MX6 UL/ULL devicetree bindings
Add devicetree bindings for i.MX6 UL/ULL based phyCORE-i.MX6 UL/ULL and
phyBOARD-Segin.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions