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| author |   Takashi Sakamoto <o-takashi@sakamocchi.jp> | 2014-10-26 22:49:45 +0900 |
|---|---|---|
| committer |   Takashi Iwai <tiwai@suse.de> | 2014-10-27 08:39:11 +0100 |
| commit | 7ce5c9268bacbe5ceca7849450c80e280aacd4c0 (patch) | |
| tree | 39fcbfaed2f3836ad2ea6d335ced878ff6d3415e /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ALSA: hda/realtek - Update restore default value for ALC283 (diff) | |
| download | wireguard-linux-7ce5c9268bacbe5ceca7849450c80e280aacd4c0.tar.xz wireguard-linux-7ce5c9268bacbe5ceca7849450c80e280aacd4c0.zip | |
ALSA: bebob: fix wrong decoding of clock information for Terratec PHASE 88 Rack FW
Terratec PHASE 88 rack fw has two registers for source of clock, one is
for internal/external, and another is for wordclock/spdif for external.
When clock source is internal, information in another register has no meaning.
Thus it must be ignored, but current implementation decodes it. This causes
over-indexing reference to labels.
Reported-by: András Murányi <muranyia@gmail.com>
Tested-by: András Murányi <muranyia@gmail.com>
Signed-off-by: Takashi Sakamoto <o-takashi@sakamocchi.jp>
Acked-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions