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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2017-03-28 12:45:32 +0200 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2017-03-28 14:29:45 +0200 |
| commit | 7f698bf60e3a13c991577f5360f371e2a41cf40e (patch) | |
| tree | 6c7a9eb2bf32576df3393ffbfe69d241dab880d4 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: r8a7794: Correct clock of DU1 (diff) | |
| download | wireguard-linux-7f698bf60e3a13c991577f5360f371e2a41cf40e.tar.xz wireguard-linux-7f698bf60e3a13c991577f5360f371e2a41cf40e.zip | |
ARM: dts: alt: Correct clock of DU1
The second channel of the display unit uses a different module clock
than the first channel.
Fixes: 876e7fb9f418fd86 ("ARM: shmobile: r8a7794: alt: Enable VGA port")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions