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| author |   Chen-Yu Tsai <wens@csie.org> | 2015-01-13 09:37:29 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@free-electrons.com> | 2015-01-21 09:59:16 +0100 |
| commit | 809ed95f5c649bc660fca852698c8102b039cbd3 (patch) | |
| tree | 41466e4e2b163a70c373b3326cc8e5e12a58ba99 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: sun9i: Add clock-indices property for bus gate clocks (diff) | |
| download | wireguard-linux-809ed95f5c649bc660fca852698c8102b039cbd3.tar.xz wireguard-linux-809ed95f5c649bc660fca852698c8102b039cbd3.zip | |
ARM: dts: sunxi: Use label to reference pio in sunxi-common-regulators
Use the label to reference the pin controller node, so that we can use
sunxi-common-regulators with sunxi families that don't share the same
address space mappings, such as sun9i.
This patch is mostly space changes due to the reduction of node parents.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions