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| author |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2022-11-25 15:42:35 +0100 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2022-11-29 10:20:58 -0600 |
| commit | 89f53acc117e83b5d26ed66d558faa6fa8d9f6b9 (patch) | |
| tree | e053c0a04ce7d9f02d80c103bcbf92d336a8d027 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node (diff) | |
| download | wireguard-linux-89f53acc117e83b5d26ed66d558faa6fa8d9f6b9.tar.xz wireguard-linux-89f53acc117e83b5d26ed66d558faa6fa8d9f6b9.zip | |
arm64: dts: altera: align LED node names with dtschema
The node names should be generic and DT schema expects certain pattern:
altera/socfpga_stratix10_socdk.dtb: leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions