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author | 2017-07-28 15:27:49 +0200 | |
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committer | 2017-08-04 12:59:30 +0200 | |
commit | 985333b0eef8603b02181c4ec0a722b82be9642d (patch) | |
tree | adf0c4269b421d0bc97ba2e706fd0c735a5c5613 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | bus: uniphier-system-bus: set up registers when resuming (diff) | |
download | wireguard-linux-985333b0eef8603b02181c4ec0a722b82be9642d.tar.xz wireguard-linux-985333b0eef8603b02181c4ec0a722b82be9642d.zip |
ARM: dts: tango4: Request RGMII RX and TX clock delays
RX and TX clock delays are required. Request them explicitly.
Fixes: cad008b8a77e6 ("ARM: dts: tango4: Initial device trees")
Cc: stable@vger.kernel.org
Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions