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author | 2024-04-29 21:49:20 +0200 | |
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committer | 2024-04-30 11:54:02 +0900 | |
commit | 9a8cadddd9303ae15d1d518c4f2ddf00ee668729 (patch) | |
tree | 8e3f9be51c22b3a80c88a918a4f6597c21f4b414 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | ASoC: dt-bindings: tegra30-i2s: convert to dt schema (diff) | |
download | wireguard-linux-9a8cadddd9303ae15d1d518c4f2ddf00ee668729.tar.xz wireguard-linux-9a8cadddd9303ae15d1d518c4f2ddf00ee668729.zip |
ASoC: sunxi: DMIC: Add controls for adjusting the mic gains
The AllWinner H6 and later SoCs that sport a DMIC block contain a set of registers to control
the gain (left + right) of each of the four supported channels.
Add ASoC controls for changing each of the stereo channel gains using alsamixer and alike
Signed-off-by: Joao Schim <joao@schimsalabim.eu>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20240429194920.1596257-1-joao@schimsalabim.eu
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions