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| author |   Florian Vaussard <florian.vaussard@gmail.com> | 2017-02-27 10:35:02 -0600 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2017-03-06 15:54:58 -0600 |
| commit | 9f24e8165917b574c03f80f2a7fee6ed986d9062 (patch) | |
| tree | 4c86b34112525555837967bdbb4c4e455e3e922f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Linux 4.11-rc1 (diff) | |
| download | wireguard-linux-9f24e8165917b574c03f80f2a7fee6ed986d9062.tar.xz wireguard-linux-9f24e8165917b574c03f80f2a7fee6ed986d9062.zip | |
ARM: dts: socfpga: Add unit name to clock nodes
Most clock nodes in Arria5, Cyclone5 and Arria10 have a reg property but
does not have a unit name. This will trigger several warnings like this
one (when compiled with W=1):
Node /soc/clkmgr@ffd04000/clocks/periph_pll has a reg or ranges
property, but no unit name
Add the corresponding unit name to each node.
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions