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| author |   Geert Uytterhoeven <geert+renesas@glider.be> | 2016-11-02 20:53:26 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-11-02 20:53:26 +0100 |
| commit | a05de66ea69f300158186c86eceb602fca088c16 (patch) | |
| tree | 1e7d5b1f759f96f08592a9ba391d7e32cd9a5c2c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | clk: renesas: r8a7796: Add DU and LVDS clocks (diff) | |
| parent | clk: renesas: rcar-gen2: Remove obsolete rcar_gen2_clocks_init() (diff) | |
| download | wireguard-linux-a05de66ea69f300158186c86eceb602fca088c16.tar.xz wireguard-linux-a05de66ea69f300158186c86eceb602fca088c16.zip | |
Merge branch 'rcar-rst' into clk-renesas-for-v4.10
soc: renesas: Add R-Car RST driver for obtaining mode pin state
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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