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| author |   Stephen Boyd <sboyd@kernel.org> | 2024-04-19 14:16:52 -0700 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2024-04-19 14:16:52 -0700 |
| commit | a09b2d6a3be5e7856e1a664bcfaaa3dcd6583b91 (patch) | |
| tree | e74973afcea064a6ed1705dbea500b4985995a85 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Linux 6.9-rc1 (diff) | |
| parent | clk: renesas: r8a779h0: Add timer clocks (diff) | |
| download | wireguard-linux-a09b2d6a3be5e7856e1a664bcfaaa3dcd6583b91.tar.xz wireguard-linux-a09b2d6a3be5e7856e1a664bcfaaa3dcd6583b91.zip | |
Merge tag 'renesas-clk-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add thermal, serial (SCIF), and timer (CMT/TMU) clocks on R-Car V4M
- Miscellaneous fixes and improvements
* tag 'renesas-clk-for-v6.10-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r8a779h0: Add timer clocks
clk: renesas: r8a779h0: Add SCIF clocks
clk: renesas: r9a07g044: Mark resets array as const
clk: renesas: r9a07g043: Mark mod_clks and resets arrays as const
clk: renesas: r8a779h0: Add thermal clock
dt-bindings: clock: r9a07g043-cpg: Annotate RZ/G2UL-only core clocks
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions