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| author |   Joseph Lo <josephl@nvidia.com> | 2019-01-04 11:06:59 +0800 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2019-02-07 19:03:09 +0100 |
| commit | a1304d352cca26dc80b70c869848d3ea50f6a54f (patch) | |
| tree | 263b84b87274d7d0393b477ccccd5312048ef24f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: tegra: Add pinmux for PWM-based DFLL support on P2597 (diff) | |
| download | wireguard-linux-a1304d352cca26dc80b70c869848d3ea50f6a54f.tar.xz wireguard-linux-a1304d352cca26dc80b70c869848d3ea50f6a54f.zip | |
arm64: tegra: Enable DFLL clock on Jetson TX1
Enable DFLL clock for Jetson TX1 platform.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions