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author | 2023-02-21 11:50:38 +0100 | |
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committer | 2023-05-17 14:13:31 +0200 | |
commit | a34ebb17546d209cbb0b9b2c94303f25749557d7 (patch) | |
tree | f9532c85c3d03514b5a307e4f0f41c897cea1afc /tools/perf/scripts/python/export-to-postgresql.py | |
parent | arm64: dts: microchip: sparx5: do not use PSCI on reference boards (diff) | |
download | wireguard-linux-a34ebb17546d209cbb0b9b2c94303f25749557d7.tar.xz wireguard-linux-a34ebb17546d209cbb0b9b2c94303f25749557d7.zip |
arm64: dts: microchip: sparx5: correct CPU address-cells
There is no reason for CPU node #address-cells to be set at 2, so lets
change them to 1 and update the reg property accordingly.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Link: https://lore.kernel.org/r/20230221105039.316819-2-robert.marko@sartura.hr
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions