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author | 2024-12-20 16:39:23 +0800 | |
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committer | 2025-02-14 13:06:44 -0800 | |
commit | aa49bc2ca8524186ceb0811c23a7f00c3dea6987 (patch) | |
tree | e40235de058bde9c364ee22a1fd77a93bb6677b3 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | rseq/selftests: Fix riscv rseq_offset_deref_addv inline asm (diff) | |
download | wireguard-linux-aa49bc2ca8524186ceb0811c23a7f00c3dea6987.tar.xz wireguard-linux-aa49bc2ca8524186ceb0811c23a7f00c3dea6987.zip |
riscv: signal: fix signal frame size
The signal context of certain RISC-V extensions will be appended after
struct __riscv_extra_ext_header, which already includes an empty context
header. Therefore, there is no need to preserve a separate hdr for the
END of signal context.
Fixes: 8ee0b41898fa ("riscv: signal: Add sigcontext save/restore for vector")
Signed-off-by: Yong-Xuan Wang <yongxuan.wang@sifive.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Andy Chiu <AndybnAC@gmail.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20241220083926.19453-2-yongxuan.wang@sifive.com
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions