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author | 2019-11-04 16:39:35 -0500 | |
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committer | 2019-12-05 18:15:30 -0500 | |
commit | aa4febf5098572649846b4f28a2609233388c412 (patch) | |
tree | 533566b0c22631ce2719fa530c1a38b7cbbe16cc /tools/perf/scripts/python/export-to-postgresql.py | |
parent | drm/amd/display: Map DSC resources 1-to-1 if numbers of OPPs and DSCs are equal (diff) | |
download | wireguard-linux-aa4febf5098572649846b4f28a2609233388c412.tar.xz wireguard-linux-aa4febf5098572649846b4f28a2609233388c412.zip |
drm/amd/display: fix DalDramClockChangeLatencyNs override
[why]
pstate_latency_us never gets updated from the hard coded value
in rn_clk_mgr.c
[how]
update the wm table's values before we do calculations with them
Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions