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| author |   Ulrich Hecht <ulrich.hecht+renesas@gmail.com> | 2019-01-10 16:32:32 +0100 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2019-01-17 14:15:57 +0100 |
| commit | adbb78e1104a006275e0e8e37526f617bb2a3d91 (patch) | |
| tree | adfa55675cde6419a92147b25d605ffe774eec50 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | ARM: dts: r8a7743: Fix sorting of rwdt node (diff) | |
| download | wireguard-linux-adbb78e1104a006275e0e8e37526f617bb2a3d91.tar.xz wireguard-linux-adbb78e1104a006275e0e8e37526f617bb2a3d91.zip | |
ARM: dts: r8a7778: Add HSCIF0/1 support
Add HSCIF0/1 clocks and device nodes, based on Rev. 1.00 of the R-Car
M1A datasheet.
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
[geert: Squashed two patches]
[geert: Correct HSCIF1 module clock index]
[geert: Correct reg properties for non-LPAE]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions