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authorKedareswara rao Appana <appana.durga.rao@xilinx.com>2016-07-01 17:07:06 +0530
committerVinod Koul <vinod.koul@intel.com>2016-07-08 11:25:34 +0530
commitb0cc417c1637192be658e68a74c8d1568e3d35f6 (patch)
tree1ad03ac982bc0e17c3a34b0b2ce0bf30999145d7 /tools/perf/scripts/python/export-to-postgresql.py
parentDocumentation: DT: dma: Add Xilinx zynqmp dma device tree binding documentation (diff)
downloadwireguard-linux-b0cc417c1637192be658e68a74c8d1568e3d35f6.tar.xz
wireguard-linux-b0cc417c1637192be658e68a74c8d1568e3d35f6.zip
dmaengine: Add Xilinx zynqmp dma engine driver support
Added the driver for zynqmp dma engine used in Zynq UltraScale+ MPSoC. This dma controller supports memory to memory and I/O to I/O buffer transfers. Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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