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| author |   Imre Deak <imre.deak@intel.com> | 2023-03-23 16:20:33 +0200 |
|---|---|---|
| committer | Imre Deak <imre.deak@intel.com> | 2023-04-03 11:35:31 +0300 |
| commit | b108bdd0e22a402bd3e4a6391acbb6aefad31a9e (patch) | |
| tree | 0f8fadee3b812f304456c50fdae3c29b5f9c23ec /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | drm/i915: Move shared DPLL disabling into CRTC disable hook (diff) | |
| download | wireguard-linux-b108bdd0e22a402bd3e4a6391acbb6aefad31a9e.tar.xz wireguard-linux-b108bdd0e22a402bd3e4a6391acbb6aefad31a9e.zip | |
drm/i915: Disable DPLLs before disconnecting the TC PHY
Bspec requires disabling the DPLLs on TC ports before disconnecting the
port's PHY. Add a post_pll_disable encoder hook and move the call to
disconnect the port's PHY from the post_disable hook to the new hook.
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230323142035.1432621-28-imre.deak@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions