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author | 2024-05-22 06:43:21 +0200 | |
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committer | 2024-07-04 14:46:14 +0000 | |
commit | bc9792f32cbd1a3bf8afef78efa5a9116323ca83 (patch) | |
tree | c110d17859895cb76b08506ec43f4c7d75608d71 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | dt-bindings: PCI: qcom: Add OPP table (diff) | |
download | wireguard-linux-bc9792f32cbd1a3bf8afef78efa5a9116323ca83.tar.xz wireguard-linux-bc9792f32cbd1a3bf8afef78efa5a9116323ca83.zip |
dt-bindings: PCI: mediatek,mt7621-pcie: Add PCIe host topology ASCII graph
MediaTek MT7621 PCIe sub-system supports a single Root Complex (RC)
with 3 Root Ports. Add PCIe host topology ASCII graph to the binding
for completeness.
Suggested-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/linux-pci/20240522044321.3205160-1-sergio.paracuellos@gmail.com
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions