diff options
| author |   Arnd Bergmann <arnd@arndb.de> | 2024-02-23 13:53:30 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2024-02-23 13:53:30 +0100 |
| commit | bcb323bd10a1b6e2a041f0730e094f522d18c709 (patch) | |
| tree | f673163435b3b85405af96f5d08441c5c47fe442 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: qcom: Fix interrupt-map cell sizes (diff) | |
| parent | cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback() (diff) | |
| download | wireguard-linux-bcb323bd10a1b6e2a041f0730e094f522d18c709.tar.xz wireguard-linux-bcb323bd10a1b6e2a041f0730e094f522d18c709.zip | |
Merge tag 'riscv-cache-fixes-for-v6.8-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/fixes
RISC-V Cache driver fixes for v6.8-rc6
A single fix for an inconsistency reported during CIP review by Pavel in
the newly added ax45mp cache driver.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-cache-fixes-for-v6.8-rc6' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
cache: ax45mp_cache: Align end size to cache boundary in ax45mp_dma_cache_wback()
Link: https://lore.kernel.org/r/20240221-keenness-handheld-b930aaa77708@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions