diff options
| author |   Dalon Westergreen <dalon.westergreen@linux.intel.com> | 2020-03-19 12:27:39 -0700 |
|---|---|---|
| committer |   Dinh Nguyen <dinguyen@kernel.org> | 2020-03-20 14:27:39 -0500 |
| commit | bd76a4f94239023106210178bb4c36abce3cee3f (patch) | |
| tree | feefdb363d1e5c3b10ad39107a76d5578d2df9f3 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: increase the QSPI reg address for Stratix10 and Agilex (diff) | |
| download | wireguard-linux-bd76a4f94239023106210178bb4c36abce3cee3f.tar.xz wireguard-linux-bd76a4f94239023106210178bb4c36abce3cee3f.zip | |
ARM: socfpga: arria10: Add ptp_ref clock to ethernet nodes
The ptp_ref clock for Arria10 defaults to using the peripheral
pll emac ptp clock. Without the ptp_ref clock in the gmac nodes
the driver defaults to the gmac main clock resulting in an
incorrect period for the ptp counter.
Signed-off-by: Dalon Westergreen <dalon.westergreen@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions