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| author |   Takahiro Kuwano <Takahiro.Kuwano@infineon.com> | 2023-07-26 10:52:49 +0300 |
|---|---|---|
| committer |   Tudor Ambarus <tudor.ambarus@linaro.org> | 2023-07-26 12:39:10 +0300 |
| commit | c0aa05123f116c709c816130ef4e55a6748e5e1a (patch) | |
| tree | 42e19b3ae1b7c570f3733e98a115071e0ceba443 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | mtd: spi-nor: spansion: preserve CFR2V[7] when writing MEMLAT (diff) | |
| download | wireguard-linux-c0aa05123f116c709c816130ef4e55a6748e5e1a.tar.xz wireguard-linux-c0aa05123f116c709c816130ef4e55a6748e5e1a.zip | |
mtd: spi-nor: spansion: prepare octal dtr methods for multi chip support
Infineon's multi-chip package (MCP) devices require the octal DTR
configuration to be set for each die. Split common code in
dedicated methods to ease the octal DDR MCP support addition.
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Link: https://lore.kernel.org/r/20230726075257.12985-4-tudor.ambarus@linaro.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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