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| author |   Drew Fustini <dfustini@tenstorrent.com> | 2024-08-01 11:38:06 -0700 |
|---|---|---|
| committer |   Drew Fustini <drew@pdp7.com> | 2024-08-08 09:19:45 -0700 |
| commit | c101b4a028e21ceaa4e39a62ee36a404d7b4bca9 (patch) | |
| tree | 6faf774e24f0d1d15be208818ebe4942f5254d24 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | riscv: dts: thead: Add TH1520 AP_SUBSYS clock controller (diff) | |
| download | wireguard-linux-c101b4a028e21ceaa4e39a62ee36a404d7b4bca9.tar.xz wireguard-linux-c101b4a028e21ceaa4e39a62ee36a404d7b4bca9.zip | |
riscv: dts: thead: change TH1520 uart nodes to use clock controller
Change the clock property in TH1520 uart nodes to a clock provided by
AP_SUBSYS clock controller.
Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions