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| author |   Zhangjin Wu <falcon@tinylab.org> | 2023-05-19 01:02:12 +0800 |
|---|---|---|
| committer |   Paul E. McKenney <paulmck@kernel.org> | 2023-06-09 11:46:07 -0700 |
| commit | c22c7c81af4d061e484e0833fbc3418d0f3008d4 (patch) | |
| tree | 75a884960dd2f143043008cd99eba880f20c436b /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | tools/nolibc: remove LINUX_REBOOT_ constants (diff) | |
| download | wireguard-linux-c22c7c81af4d061e484e0833fbc3418d0f3008d4.tar.xz wireguard-linux-c22c7c81af4d061e484e0833fbc3418d0f3008d4.zip | |
tools/nolibc: riscv: Fix up load/store instructions for rv32
When compile nolibc application for rv32, we got such errors:
nolibc/sysroot/riscv/include/arch.h:190: Error: unrecognized opcode `ld a4,0(a3)'
nolibc/sysroot/riscv/include/arch.h:194: Error: unrecognized opcode `sd a3,%lo(_auxv)(a4)'
nolibc/sysroot/riscv/include/arch.h:196: Error: unrecognized opcode `sd a2,%lo(environ)(a3)'
Refer to arch/riscv/include/asm/asm.h and add REG_L/REG_S macros here to let
rv32 uses its own lw/sw instructions.
Signed-off-by: Zhangjin Wu <falcon@tinylab.org>
Signed-off-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions