diff options
| author |   Stephen Boyd <sboyd@kernel.org> | 2023-12-16 16:36:25 -0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-12-16 16:36:25 -0800 |
| commit | c46104f0c53d0da31fa338ff5ff8fb6c3ea14061 (patch) | |
| tree | b63cab6d9da22659ccf29316430c413c150710f6 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | Merge tag 'renesas-clk-for-v6.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas (diff) | |
| parent | clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1 (diff) | |
| download | wireguard-linux-c46104f0c53d0da31fa338ff5ff8fb6c3ea14061.tar.xz wireguard-linux-c46104f0c53d0da31fa338ff5ff8fb6c3ea14061.zip | |
Merge tag 'renesas-clk-for-v6.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S
- Check reset monitor registers on Renesas RZ/G2L-alike SoCs
* tag 'renesas-clk-for-v6.8-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a08g045: Add clock and reset support for ETH0 and ETH1
clk: renesas: rzg2l: Check reset monitor registers
clk: renesas: r9a08g045: Add IA55 pclk and its reset
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions