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author | 2022-08-18 21:21:46 +0800 | |
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committer | 2023-03-22 13:36:55 -0700 | |
commit | c5a295caefa33ce7599d7afbe7a2e9b1bc8d92a2 (patch) | |
tree | 1719bcf36c07728b8d6fe811ae922a1a2ef08881 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | tools/power/x86/intel-speed-select: Display fact info for non-cpu power domain (diff) | |
download | wireguard-linux-c5a295caefa33ce7599d7afbe7a2e9b1bc8d92a2.tar.xz wireguard-linux-c5a295caefa33ce7599d7afbe7a2e9b1bc8d92a2.zip |
tools/power/x86/intel-speed-select: Hide invalid TRL level
TRL levels with Zero ratio values is meaningless.
Prevent these TRL levels from being displayed.
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions