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| author |   Andre Przywara <andre.przywara@arm.com> | 2020-09-07 13:18:28 +0100 |
|---|---|---|
| committer |   Olof Johansson <olof@lixom.net> | 2020-10-03 12:56:46 -0700 |
| commit | c9794866ac30d9440b327e96b4ecc97d8f0055f6 (patch) | |
| tree | e0e3a14fcaa7848d1b9746f635d8f3bbee4c642c /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | arm64: dts: lg: Fix SP805 clocks (diff) | |
| download | wireguard-linux-c9794866ac30d9440b327e96b4ecc97d8f0055f6.tar.xz wireguard-linux-c9794866ac30d9440b327e96b4ecc97d8f0055f6.zip | |
arm64: dts: lg: Fix SP804 users
Even though the SP804 binding allows to specify only one clock, the
primecell driver requires a named clock to activate the bus clock.
Specify the one clock three times and provide some clock-names, to
make the DT match the SP804 and primecell binding.
Also add the missing arm,primecell compatible string.
Link: https://lore.kernel.org/r/20200907121831.242281-4-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions